Broadcom flags TSMC capacity limits as AI supply chain tightens

• A Broadcom product executive—not CEO Hock Tan—said in March that TSMC was reaching production limits and that expansion into 2027 made capacity a 2026 bottleneck.
• Broadcom also said it had secured its own leading-edge wafer, high-bandwidth memory and substrate capacity through 2028. Industry scarcity and Broadcom's contracted position are related, but they are not the same claim.

What Broadcom said, and what TSMC did not say

On 24 March, Reuters reported comments from Natarajan Ramachandran, director of product marketing in Broadcom's Physical Layer Products division. He said Broadcom was seeing constraints across the technology supply chain and that TSMC was reaching production-capacity limits. TSMC was adding capacity into 2027, he said, but the current limit had become a bottleneck for 2026.

This was not a joint Broadcom–TSMC warning. TSMC did not respond to Reuters for that report. Reuters instead cited the foundry's earlier statement that capacity was tight and that it was working to narrow the supply-demand gap. The previous article wrongly attributed the warning to Hock Tan and asserted that CoWoS was fully booked until late 2026 and causing Broadcom delivery delays. None of those three details appears in the March Reuters account.

Broadcom's own supply position is more specific

Broadcom had given a more guarded but important message on its 4 March results call. According to the published call transcript, management said it had fully secured capacity for leading-edge wafers, high-bandwidth memory and substrates for 2026 through 2028. The corresponding first-quarter release reported $8.4 billion of AI revenue, up 106% year on year. Securing planned capacity does not create unlimited upside supply, but it contradicts a blanket claim that packaging limits were already delaying Broadcom deliveries.

The demand signal strengthened after the original report. Broadcom's second-quarter release put AI semiconductor revenue at $10.8 billion, up 143%, and forecast $16 billion for the third quarter. These are company results and guidance, not proof that every supplier can satisfy every future order.

Broadcom's latest Form 10-Q explains the residual exposure. TSMC produced about 95% of the wafers made by Broadcom's contract manufacturers in the first two fiscal quarters of 2026. Broadcom warns that TSMC could reprioritise capacity or raise prices, and that limited-source suppliers can extend lead times or allocate memory and other materials. Long-term reservations reduce risk; they do not eliminate yield, qualification, allocation, price or demand-forecast risk.

Four constraints, not one generic “chip shortage”

Leading-edge wafers are the front-end logic dies fabricated at a foundry. This is where Broadcom's dependence on TSMC is most visible. A wafer reservation is not interchangeable with finished accelerator output: yields, process qualification and the mix among customers still matter.

HBM is stacked DRAM supplied by memory manufacturers and placed close to the accelerator to deliver high bandwidth. Broadcom included HBM in the capacity it said it had secured. HBM availability is therefore a distinct supplier commitment, even though the memory must later be integrated with logic.

Advanced packaging is the back-end integration step. TSMC's annual report describes CoWoS as a 2.5D service growing strongly with AI demand and capable of combining large logic dies and high-bandwidth memory. On its April call, TSMC said capacity remained very tight, that fabs take two to three years to build, and that large-format CoWoS was still the main packaging approach; it was also developing CoPoS. The transcript supports a capacity constraint, but not a precise public promise that CoWoS relief would arrive in late 2026.

Substrates and adjacent optical components form another layer. Ramachandran said lasers were constrained and that printed circuit boards for optical transceivers had moved from roughly six-week to six-month lead times. These are not wafers or HBM. They can still delay a complete network system even when an accelerator die is available.

Forecasts remain conditional

TSMC's position has since become clearer. In April it said AI demand was extremely robust and capacity very tight; in June CEO C.C. Wei said the company was working to avoid becoming a bottleneck and that it would take time to meet demand, according to Reuters. TSMC is increasing capital spending and capacity, but new fabs, tools and packaging lines have multi-year lead times.

Neither company's outlook is a guaranteed shipment schedule. Broadcom's custom-accelerator forecasts depend on hyperscaler plans, customer design ramps and the capacity it reserved. TSMC must allocate front-end and back-end capacity across many customers while avoiding overbuilding if orders change. Memory vendors, substrate makers, PCB suppliers and optical-component manufacturers follow their own investment and qualification cycles.

Why the distinction matters

The event reveals a layered capacity problem, not a single CoWoS countdown. Broadcom reported an industry constraint and supplier concentration while claiming that its planned critical inputs were secured. TSMC separately acknowledged tight capacity and a long expansion cycle. Buyers and investors should therefore track wafer allocation, HBM commitments, packaging throughput, substrate and optical lead times, yields and actual shipments separately.

The strongest evidence of worsening pressure would be missed deliveries, allocation notices, rising lead times or lower realised revenue against secured plans. Evidence of relief would be qualified capacity, improving lead times and shipment growth across the whole stack. Management projections should be updated as those observed measures arrive.